There is increasing demand for high-speed fiber-optic transmission of data. Advanced technologies such as 100 Gb/s optical time-multiplexed (OTDM) networks are driving the need for high-speed optical receivers. The performance of analog clock-recovery circuits, as well as the noise figures and bandwidths of preamplifiers, limit the usefulness of conventional semiconductor technologies.
Clock recovery circuits are necessary for the correct interpretation of incoming signals. Optical data is often sent in a non-return-to-zero (NRZ) mode. In the NRZ mode, data is sent continuously with no break or transition to a neutral state between bits. Thus, there may be long strings of 1's or 0's where there are no transitions between the two digital states from which the phase of the data clock can be recovered. If the clock is not properly set, the data can not be properly retimed and will thus be interpreted at the receiver incorrectly. Accordingly, there is a need in the art for clock recovery schemes which can recover the phase of the clock and retime optically transmitted data.
Current analog clock recovery schemes for datastreams operating at gigahertz (GHz) frequencies use a combination of mixing and filtering in a feedback loop to adjust the frequency of the clock recovery circuit to the clock frequency of the data. Examples of these types of systems are described in the articles by Razavi, IEEE J. of Solid-State Circuits, 3, 472 (1996) and Andersson, et al., IEEE J. of Solid-State Circuits, 3, 210 (1995). A drawback of these circuits, however, is that several hundred to a thousand or more clock cycles are typically required to recover the clock frequency. An additional drawback is that they require multichip modules to integrate the analog and digital components.
Another drawback of current semiconductor optical detection circuits is the need for one or more wideband preamplifiers between the optical detector and the semiconductor-based data recovery and analysis circuitry. The typical optical detector is a photodiode which converts the number of photons received at the photodiode per unit time to a current. This resulting current is in the tens of microamperes and so must be amplified to be used as an input for standard semiconductor circuitry. Current commercially available amplifiers limit the bandwidth of the receiver.
The optical detector circuits of the present invention overcome these drawbacks of semiconductor circuitry through the use of superconductors. Superconductor circuitry can be made sensitive to small currents and has been shown to be useful in producing ultrafast logic circuitry. For example, Likharev, et al., IEEE Trans. Appl. Supercond., 1, 3 (1991) discusses superconductor circuitry in these environments, and is herein incorporated by reference. The optical detector and clock recovery circuits of the present invention meet a need for a high speed digital optical receiver with instantaneous or near instantaneous clock recovery and without the use of noise-generating and bandwidth-limiting preamplifiers.